The Smart Cut™ process is well-known in the art for transferring a semiconductor layer onto a support substrate, in particular for fabricating semiconductor on insulator (SeOI) structures, in particular silicon on insulator (SOI) structures.
Such structures successively comprise from their base toward their surface (i.e., their active part) a support substrate, a buried dielectric layer (generally, a buried oxide or BOX) and a semiconductor layer, referred to as the active layer, transferred from a substrate, referred to as the donor substrate.
More generally, the Smart-Cut™ process can be used to transfer a layer from a donor substrate to a support substrate. The Smart Cut™ process typically comprises the following steps:
1) forming an embrittlement zone in the donor substrate so as to delimit a surface layer of the donor substrate which constitutes the semiconductor layer to be transferred;
2) bonding the donor substrate onto the support substrate; when the formation of a SeOI structure is desired, at least one of the substrates is covered with a dielectric layer intended to form the BOX;
3) providing energy to the donor substrate so as to fracture it along the embrittlement zone, thus enabling the transfer of the semiconductor layer onto the support substrate; and
4) if need be, finishing by polishing, etching, annealing, etc. of the transferred semiconductor according to its use.
The embrittlement zone is generally formed by implanting atomic species in the donor substrate. Implantation may involve only one species (hydrogen, for example), but also several species, simultaneously or sequentially (hydrogen and helium, for example). In a manner known in the art, the implanted species are distributed across the thickness of the donor substrate according to a Gaussian distribution, i.e., with a peak corresponding to the maximum of species in the vicinity of the embrittlement zone. This implantation distribution is illustrated in FIG. 1, which represents donor substrate 31 covered with oxide layer 33 through which the implantation was carried out.
Embrittlement zone 32 obtained via implantation is located just below (relative to the surface through which implantation was carried out) the peak P corresponding to the maximum of implanted species. Semiconductor layer 3 to be transferred lies between oxide layer 33 and embrittlement zone 32. On each side of implantation peak P, donor substrate 31 contains a certain quantity of implanted atoms which decreases with distance from the peak.
In view of its use for forming electronic, optoelectronic or photovoltaic devices, depending on the applications concerned, the transferred semiconductor layer can be monocrystalline. Furthermore, the transferred layer can be doped or comprise a junction, i.e., a structure constituted of at least two adjacent layers with different doping levels. The transferred layer can thus comprise a p-n junction, an n-p-n junction, a p-n-p junction and/or any doped region for purposes of producing electronic devices.
It is known that implanted species have the effect of deteriorating the crystal lattice of the material of semiconductor layer 3 to be transferred. These defects in the crystal lattice are notably likely to alter the electrical behavior of the transferred semiconductor layer. These defects consist essentially of point defects: implantation creates Frenkel pairs (an interstitial defect plus a vacancy defect) which disorganize the lattice. The dopant atoms also leave their substitutional position and thus lose their electrical activity, referred to as deactivation.
The term “crystal defects” herein refers to these types of point defects as well as to extended defects ({311} defects, dislocation loops) created by dynamic annealing during implantation or during subsequent annealing. By interacting with point defects (Frenkel pairs, dopants), these extended defects hinder the reactivation process.
Finally, the implanted atoms (H and/or He) themselves constitute point impurities (interstitial atoms) or extended impurities (platelet or {311} defects) which also interact with dopants of the transferred layer.
To avoid these disadvantages, it is known in the art to apply to the structure comprising the semiconductor layer and the support substrate a high-temperature (i.e., greater than 800° C.) heat treatment after transferring the semiconductor layer to the support substrate. Such a heat treatment aims to correct crystalline defects and to restore the crystalline quality of the semiconductor layer, as well as to diffuse the residual atoms of species implanted outside the semiconductor layer.
There are situations, however, in which it is not possible to heat the structure comprising the transferred monocrystalline semiconductor layer to such a high temperature, for example, when a metal bonding layer is inserted between the support substrate and the semiconductor layer, or when the support substrate was treated beforehand to include electronic devices, interconnections, metal zones, etc., all of which would be damaged by the application of a high-temperature heat treatment. Furthermore, when the transferred layer comprises a doped region, for example a junction, it is also necessary to minimize thermal budget in order to avoid the diffusion of dopants from the layers forming the junction. Indeed, such diffusion would make the doping interfaces less abrupt and would deteriorate the operation of the device by modifying the electrical characteristics of the junction.
US patent publication 2005/0280155 describes a method for transferring a layer comprising a junction onto a support substrate comprising electronic devices. By applying a heat treatment at a moderate temperature, i.e., typically below 500° C., it is not sufficient to restore the electrical properties of the transferred semiconductor layer. Indeed, the presence of residual hydrogen from the implantation process hinders dopant reactivation when a simple low-temperature heat treatment is carried out.
US patent publication 2010/0044706 discloses a method for transferring a monocrystalline semiconductor layer onto a support substrate. This method involves:                amorphizing a buried portion of a monocrystalline semiconductor to be transferred from a donor substrate, without disorganizing the crystal lattice of a surface portion of the monocrystalline layer,        implanting species in the donor substrate so as to form an embrittlement zone delimiting the monocrystalline layer to be transferred,        bonding the donor substrate to the support substrate,        fracturing the donor substrate at the embrittlement zone, so as to transfer the monocrystalline layer onto the support substrate, the portion that has been kept monocrystalline being at the interface with the support substrate and the amorphous portion being at the surface of the structure obtained after the transfer step, and        recrystallizing the amorphous portion of the transferred monocrystalline layer, the crystal lattice of the underlying portion that has remained monocrystalline serving as a seed for recrystallization, the recrystallization being carried out at a temperature of between 550 and 600° C.        
This recrystallization step of the amorphous portion is known in the art under the name of Solid Phase Epitaxy (SPE) and it has the effect of activating the dopants contained in the amorphous portion. In this method, however, the species that are implanted into the monocrystalline layer to form the embrittlement zone go through the portion that has been kept monocrystalline during the amorphisation step. As a consequence, the monocrystalline portion is damaged by the implanted species and, in particular, the dopants that it may contain are deactivated. Since this portion is not amorphous but monocrystalline, the damage will not be healed by the recrystallization step, and the dopants will not be reactivated in this portion, unless a conventional heat treatment is carried out at a high temperature.
One goal of the invention is thus to define a method for transferring a monocrystalline semiconductor layer onto a support substrate following which the transferred layer no longer contains the crystalline defects possibly generated by the embrittlement implantation. In particular, one goal of the invention is to restore to a transferred layer comprising a doped region its initial electrical properties, in spite of the dopant deactivation generated by the embrittlement implantation. Besides, the method should be able to be implemented entirely at moderate temperatures, i.e., not exceeding roughly 500° C. These methods are now described in the following text and claims.